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Pujari, Shashank
- Internal Dynamic Partial Reconfiguration for Real Time Signal Processing on FPGA
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Authors
Affiliations
1 Dept. of Microelectronics and VLSI Design, International Institute of Information Technology, Pune-411057, IN
2 Department of Electronics Engineering, Walchand College of Engg., Sangli 416415, IN
1 Dept. of Microelectronics and VLSI Design, International Institute of Information Technology, Pune-411057, IN
2 Department of Electronics Engineering, Walchand College of Engg., Sangli 416415, IN
Source
Indian Journal of Science and Technology, Vol 3, No 4 (2010), Pagination: 365-368Abstract
Few FPGAs support creation of partially reconfigurable systems when compared to traditional systems based on total reconfiguration. This allows dynamic change of the functionalities hosted on the device when needed and while the rest of the system continues its working. Runtime partial reconfiguration of FPGA is an attractive feature which offers countless benefits across multiple industries. Xilinx has supported partial reconfiguration for many generations of devices. This can be taken advantage of substituting inactive parts of hardware systems and to adapt the complete chip a different requirement of an application. This paper describes an innovative implementation for real time audio and video processing using run time internal partial reconfiguration. System is implemented on Virtex-4 FPGA. Internal reconfiguration is handled using internal configuration access port (ICAP) driven by soft processor core. The considerable savings in device resources, bit stream size and configuration time is observed and tabulated in this paper.Keywords
Reconfigurable Computing, Partial Reconfiguration, Run Time Reconfiguration, Internal ReconfigurationFull Text
References
- Bayar S and Yurdakul A (2008) Dynamic partial selfreconfiguration on spartan III FPGAs via a parallel configuration access port (PCAP). Proceedings of HiPEAC Workshop on Reconfigurable Computing, Goteborg, Sweden.
- Bhandari S, Subbaraman S, Pujari S and Mahajan R (2009) Realtime video processing on FPFA using on the fly partial reconfiguration http://www.computer.org/ portal/web/csdl/ doi/10.1109/ICSPS.2009.32.
- Blodget, B., McMillan, S., and Lysaght, P. 2003. A Lightweight Approach for Embedded Reconfiguration of FPGAs. In Proc. Conference on Design, Automation and Test in Europe - Volume 1 (March 03 - 07, 2003). Design, Automation, and Test in Europe. IEEE Computer Society, Washington, DC, 10399.
- Chanda B and Majumdar D (2003) Digital image processing and analysis. 1st edn. Prentice-Hall, India. pp103-109.
- DS280 (2006) OPB HWICAP (v1.00.b) www.xilinx.com.
- Jack K (2005) Video demystified: A handbook for digital engineer, 4th edn. Elsevier LLH Technology Publishing, Eagle Rock, VA. pp: 115-238.
- Jackson B (2007) Partial reconfiguration design with Planahead 9.2 (v1.1) www.xilinx.com
- Koo C (2005) Benefits of partial reconfiguration. Xilinx Xcell J. 55, 65-67.
- Lagger A (2006) Self reconfigurable platform for cryptographic application. In: Proc. Intl. Conf. on Field Programmable Logic & Appln., Aug 28-30,Madrid, Spain.
- Oppenheim AV and Schafer RW (2000) Discrete-time signal processing. 2nd edn. Prentice-Hall, India. pp: 503-507.
- Paulsson K, Hübner M, Bayar S and Becker J (2008) Exploitation of run-time partial reconfiguration for dynamic power management in Xilinx spartan III-based systems. In: Proc. Intl. Conf. on Field Programmable Logic & Appln., (FPL 2008). Sept. 8-10. pp: 699-700.
- UG070 (2005) Virtex-4 user guide. (v1.2) www.xilinx.com.
- UG083 (2006) ML40X Getting started tutorial for evaluation platforms (v5.0). http://www.xilinx.com/ support/ documentation/ boards_and_kits/ug083.pdf.
- Xapp138 (2000) Virtex FPGA series configuration and readback (v2.0).
- XAPP290 (2004) Two flows for partial reconfiguration: Module based and difference based (v1.2) http://www.xilinx.com/support/documentation/application_not es/xapp290.pdf.